multicore
npx machina-cli add skill beriberikix/zephyr-agent-skills/multicore --openclawZephyr Multicore Development
Leverage multiple CPU cores to increase performance, isolate critical tasks, and integrate heterogeneous systems.
Core Workflows
1. SMP Configuration
Run the Zephyr kernel and your threads across multiple identical cores.
- Reference: smp_configuration.md
- Key Tools:
CONFIG_SMP,k_spinlock, Thread Affinity.
2. OpenAMP & RPMsg
Communicate between heterogeneous cores (e.g., A-series and M-series) using standard protocols.
- Reference: openamp_rpmsg.md
- Key Tools:
CONFIG_OPENAMP, message vrings, Resource Tables.
3. IPC Patterns
Implement efficient data exchange between cores using high-level services or low-level mailboxes.
- Reference: ipc_patterns.md
- Key Tools:
IPC Service, IPM drivers, Shared Memory.
4. LLEXT (Linkable Extensions)
Dynamically load and run binary modules at runtime without a full firmware update.
- Reference: llext_basics.md
- Key Tools:
CONFIG_LLEXT, dynamic ELF loading, Symbol Export.
Quick Start (SMP prj.conf)
# Enable SMP for dual-core SoCs
CONFIG_SMP=y
CONFIG_MP_NUM_CPUS=2
// Using spinlocks for cross-core sync
struct k_spinlock lock;
k_spinlock_key_t key = k_spin_lock(&lock);
// ... critical section ...
k_spin_unlock(&lock, key);
Professional Patterns (Architecture Design)
- Linux Bridging: Use OpenAMP/RPMsg to bridge Zephyr real-time logic with a Linux application controller.
- Core Isolation: Pin high-frequency interrupts (e.g., motor control) to Core 1 and keep the main application on Core 0 to prevent jitter.
- Zero-Copy Transfers: Use shared memory regions for large data (video/audio) and only pass meta-data via IPC channels to minimize overhead.
Resources
- References:
smp_configuration.md: Configuration and spinlocks.openamp_rpmsg.md: AMP and Linux interoperability.ipc_patterns.md: Mailboxes and high-level IPC services.llext_basics.md: Dynamic code loading.
Source
git clone https://github.com/beriberikix/zephyr-agent-skills/blob/main/skills/multicore/SKILL.mdView on GitHub Overview
Zephyr Multicore Development lets you leverage multiple CPU cores to boost performance, isolate critical tasks, and integrate heterogeneous systems. It covers SMP for identical cores, AMP with OpenAMP/RPMsg for cross-core communication, IPC patterns for efficient data exchange, and LLEXT for runtime module loading.
How This Skill Works
Enable SMP with CONFIG_SMP and configure the number of CPUs (CONFIG_MP_NUM_CPUS). Use k_spinlock and thread affinity for cross-core synchronization. For AMP, employ OpenAMP/RPMsg with Resource Tables to communicate between heterogeneous cores. IPC patterns rely on high-level services, IPM drivers, and shared memory, while LLEXT uses CONFIG_LLEXT for dynamic ELF loading of modules.
When to Use It
- Designing SoCs with multiple homogeneous or heterogeneous cores
- Running kernel and threads across multiple identical cores (SMP)
- Communicating between heterogeneous cores using OpenAMP/RPMsg (AMP)
- Implementing efficient cross-core data exchange via IPC patterns
- Dynamically loading and executing binary modules at runtime with LLEXT
Quick Start
- Step 1: Enable SMP for dual-core SoCs in prj.conf: CONFIG_SMP=y and CONFIG_MP_NUM_CPUS=2
- Step 2: Use spinlocks for cross-core synchronization, e.g. k_spinlock and k_spin_lock / k_spin_unlock
- Step 3: Review references for SMP, OpenAMP/RPMsg, IPC patterns, and LLEXT to complete setup
Best Practices
- Enable SMP in prj.conf (CONFIG_SMP=y) and set CONFIG_MP_NUM_CPUS to match cores
- Use thread affinity and k_spinlock for deterministic cross-core synchronization
- Leverage OpenAMP/RPMsg with proper memory resources and a Resource Table for AMP
- Adopt IPC services, IPM drivers, and shared memory to minimize transfer overhead
- Enable LLEXT (CONFIG_LLEXT) and follow secure, modular ELF loading practices
Example Use Cases
- Linux on one core communicating with Zephyr on another via RPMsg
- Pin high-frequency interrupts (e.g., motor control) to Core 1 while Core 0 handles the main app
- Zero-copy video processing using shared memory and IPC metadata
- Runtime loading of a neural inference module via LLEXT
- Cross-core IPC patterns in an automotive control system coordinating sensors and actuators
